Physical Address Extension

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In computing, Physical Address Extension (PAE) is a feature first implemented in the Intel Pentium Pro to allow x86 processors to access more than 4 gigabytes of random access memory if the operating system supports it. It was extended by Advanced Micro Devices to add a level to the page table hierarchy, to allow it to handle up to 52-bit physical addresses, add NX bit functionality, and make it the mandatory memory paging model in long mode[1]. PAE is provided by Intel Pentium Pro (and above) CPUs - including all later Pentium-series processors except the 400 MHz bus versions of the Pentium M, as well as by other processors such as the AMD Athlon and later AMD processor models with similar or more advanced versions of the same architecture.

x86 processor hardware architecture is augmented with additional address lines used to select the additional memory, so physical address size is increased from 32 bits to 36 bits. This, theoretically, increases maximum physical memory size from 4 GB to 64 GB. The 32-bit size of the virtual address is not changed, so regular application software continues to use instructions with 32-bit addresses and (in a flat memory model) is limited to 4 gigabytes of virtual address space. The operating system uses page tables to map this 4-GB address space into the 64 GB of physical memory. The mapping is typically applied differently for each process. In this way, the extra memory is useful even though no single regular application can access it all simultaneously.

For application software which needs access to more than 4 GB of RAM, some special mechanisms may be provided by the operating system in addition to the regular PAE support. On Microsoft Windows this mechanism is called Address Windowing Extensions, while on Unix-like systems a variety of techniques are used, such as using mmap() to map regions of a file into and out of the address space as needed.

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[edit] Page table structures

In traditional 32-bit protected mode, x86 processors use a two-level page translation scheme, where the control register CR3 points to a single 4 KiB long page directory, which is divided 1024 × 4 byte entries that point to 4 KiB long page tables, similarly consisting of 1024 × 4 byte entries pointing to 4 KiB long pages.

Enabling PAE (by setting bit 5, PAE, of the system register CR4) causes major changes to this scheme. By default, the size of each page remains as 4 KiB. Each entry in the page table and page directory is extended to 64 bits (8 bytes) rather than 32 bits to allow for additional address bits; however, the size of tables does not change, so both table and directory now have only 512 entries. Because this allows only half as many entries as the original scheme, an extra level of hierarchy has been added, so CR3 now points to the Page Directory Pointer Table, a short table which contains pointers to 4 page directories.

The entries in the page directory have an additional flag in bit 7, named PS (for Page Size). If this bit is set to 1, the page directory entry does not point to a page table, but to a single large 2 MiB page. The NX bit is another flag in the page directory, in bit 63, to mark pages as "No eXecute". Because the 12 least significant bits of the page table entry's 64 bits are either similar flags or are available for OS-specific data, a maximum of 52 bits can be potentially used in the future to address 252 bytes, or 4 pebibytes, of physical memory.

CPU support of PAE mode can be identified via the CPUID flag PAE.

On x86-64 processors in native long mode, the address translation scheme is similar to PAE but with a fourth table, the "page-map level 4" table; this and the Page Directory Pointer Table are 512 entries long. 36 bits of virtual page number are translated, giving a virtual address space of up to 256 TB. In the page table entries, in the original specification, 40 bits of physical page number are implemented out of 52 bits possible. Later x86-64 CPUs may implement more bits of physical page number.

[edit] Operating system support

[edit] FreeBSD

FreeBSD supports PAE in the 4.x series starting with 4.9, in the 5.x series starting with 5.1, and in all 6.x and later releases. The kernel PAE configuration option is required. Loadable kernel modules can only be loaded into a kernel with PAE enabled if the modules were built with PAE enabled; the binary modules in FreeBSD distributions are not built with PAE enabled, and thus cannot be loaded into PAE kernels. Not all drivers support more than 4 GB of physical memory; those drivers won't work correctly on a system with PAE.[2]

[edit] Linux

The Linux kernel includes full PAE mode support starting with version 2.3.23,[3] enabling access of up to 64 GB of memory on 32-bit machines. A PAE-enabled Linux-kernel requires that the CPU also support PAE. As of 2009[citation needed], many common Linux distributions are beginning to use a PAE-enabled kernel as the distribution-specific default[4] because it adds the NX bit [5].

[edit] Mac OS X

Mac OS X for Intel Macs supports PAE and the NX bit on all CPUs supported by Apple (from 10.4.4—the first Intel release—onwards). Mac Pro and Xserve systems can currently support 32 GB of RAM, even though the Mac OS X 10.5 Leopard kernel remains 32-bit. The Mac OS X 10.6 Snow Leopard kernel can optionally run in 64-bit on certain systems.[6]

[edit] Microsoft Windows

PAE is supported in the following releases of Microsoft Windows:[7][8][9][10] Itanium versions of these operating systems if they exist do not use PAE because the Itanium does not need PAE.

Version Maximum Physical Memory - RAM (GB)
Windows 2000 Professional, Server 4
Windows 2000 Advanced Server 8
Windows 2000 Datacenter 32
Windows XP Starter 0.5
Windows XP Home & Media Center 4
Windows XP Professional (32-bit) 4
Windows XP Professional (64-bit) 32
Windows Server 2003 Web 2
Windows Server 2003 Standard, Small Business/Home, Storage 4
Windows Server 2003 Enterprise Storage 8
Windows Server 2003 Enterprise 32
Windows Server 2003 Enterprise R2/SP1, Datacenter 64
Windows Server 2003 Datacenter R2 128
Windows Vista Starter 1
Windows Vista Home Basic, Home Premium, Business, Ultimate, Enterprise (32-bit) 4
Windows Vista Home Basic (64-bit) 8
Windows Vista Home Premium (64-bit) 16
Windows Vista Business, Enterprise, Ultimate (64-bit) 128
Windows Server 2008 Standard, Web 4
Windows Server 2008 Enterprise, Datacenter 64
Windows 7 Starter 2
Windows 7 Home Basic, Home Premium, Professional, Enterprise, Ultimate (32-bit) 4
Windows 7 Home Basic (64-bit) 8
Windows 7 Home Premium (64-bit) 16
Windows 7 Professional, Enterprise, Ultimate (64-bit) 192

Windows XP Service Pack 2 and later, by default, on processors with the no-execute (NX) or execute-disable (XD) feature, runs in PAE mode in order to allow NX.[11] The "no execute" (NX, or XD for "execution disable") bit resides in bit 63 of the page table entry and, without PAE, page table entries on 32-bit systems have only 32 bits; therefore PAE mode is required if the NX feature is to be exploited. However, "client" versions of 32-bit Windows (Windows XP, Windows Vista, Windows 7) limit physical address space to the first 4 GB for driver compatibility [12] and licensing[13] reasons, even though these versions do run in PAE mode if NX support is enabled.

[edit] Solaris

Solaris supports PAE beginning with Solaris version 7. However, third-party drivers used with version 7 which are not specifically written to include PAE support may operate erratically or fail outright on a system with PAE.[14]

[edit] See also

[edit] References

  1. ^ "AMD64 Architecture Programmer's Manual Volume 2: System Programming" (PDF). AMD64 Architecture Programmer's Manual. Advanced Micro Devices. November 1, 2009. pp. 124-143. http://support.amd.com/us/Processor_TechDocs/24593.pdf. Retrieved February 3, 2010. "Long-mode page translation requires the use of physical-address extensions (PAE). Before activating long mode, PAE must be enabled by setting CR4.PAE to 1. Activating long mode before enabling PAE causes a general-protection exception (#GP) to occur." 
  2. ^ "FreeBSD PAE(4) man page". 2003-04-08. http://www.FreeBSD.org/cgi/man.cgi?query=pae&sektion=4. Retrieved 2007-11-26. 
  3. ^ "2.3.23-pre4 x86 64GB RAM changes [HIGHMEM patch] explained a bit". http://lkml.indiana.edu/hypermail/linux/kernel/9910.2/0542.html. 
  4. ^ "x86 Specifics for Fedora 11". http://docs.fedoraproject.org/release-notes/f11/en-US/sect-Release_Notes-Architecture_Specific_Notes.html#sect-Release_Notes-x86_Specifics_for_Fedora. 
  5. ^ "1% performance overhead of paravirt_ops on native kernels". http://groups.google.com/group/linux.kernel/msg/a7b887254a092330. 
  6. ^ "Road to Mac OS X 10.6 Snow Leopard: 64-Bits". 2008-09-26. http://www.appleinsider.com/articles/08/08/26/road_to_mac_os_x_10_6_snow_leopard_64_bits.html. Retrieved 2008-09-26. 
  7. ^ "Memory Limits for Windows releases". Microsoft. December 5, 2007. http://msdn2.microsoft.com/en-us/library/aa366778.aspx. Retrieved 2007-12-10. 
  8. ^ "Intel Physical Addressing Extensions (PAE) in Windows 2000". Microsoft. October 26, 2007. http://support.microsoft.com/kb/268363/. Retrieved 2007-12-29. 
  9. ^ "Comparison of Windows Server 2003 Editions". Microsoft. March 28, 2003. http://technet.microsoft.com/en-us/library/cc758523.aspx. Retrieved 2009-05-15. 
  10. ^ "Overview of Windows Server 2003 R2 Datacenter Edition". Microsoft. Unknown. http://technet.microsoft.com/en-au/windowsserver/bb429508.aspx. Retrieved 2009-05-15. 
  11. ^ "The RAM reported by the System Properties dialog box and the System Information tool is less than you expect in Windows Vista or in Windows XP Service Pack 2 or later version (MSKB 888137)". Knowledge Base. Microsoft. http://support.microsoft.com/kb/888137. Retrieved 2009-01-30. 
  12. ^ http://blogs.technet.com/markrussinovich/archive/2008/07/21/3092070.aspx
  13. ^ http://www.geoffchappell.com/notes/windows/license/memory.htm
  14. ^ "Solaris 7 5/99 Release Notes (Intel Platform Edition), Appendix B: Hardware Compatibility List and Device Configuration Guide (Intel Platform Edition) 5/99". 1999. http://docs.sun.com/app/docs/doc/806-0225/6j9ji3kj2. Retrieved 2007-11-26. 

Not referenced, but probably should be:

Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A: System Programming Guide, Part 1

[edit] External links