Motorola 68010

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Motorola 68010 as DIP.
Motorola 68010 as PGA.

The Motorola MC68010 processor is a 16/32-bit microprocessor from Motorola, released in 1982.[1] In common with the Motorola 68000 naming convention, it is usually just referred to as the 010 (pronounced oh-one-oh).

It fixes several small flaws in the 68000, including not meeting Popek and Goldberg virtualization requirements because one instruction, MOVE from SR, is user instead of supervisor mode, and lack of support for returning from bus faults (which made it impossible to use it for virtual memory).

Additionally, the 68010 had a "loop mode", considered a mini instruction cache, which accelerates loops that consist of only 2 instructions. The overall speed gain compared to the 68000 was below 10% in practice, so it did not make much sense to upgrade the 68000 CPU with the 68010, even though the two were pin-compatible.

The 68010 was not 100% software compatible with the 68000. The most problematic difference was the exception stack frame.

Motorola 68451 MMU

The 68010 could be used with the 68451 MMU, but problems with the design, in particular a 1 clock memory access penalty made this configuration unpopular and led to other vendors such as Sun Microsystems using their own MMU design.

The 68010 was never as popular as the 68000, as the added complexity and cost turned out to not be worthwhile in practice. Most vendors looking for the MMU functionality waited for the 68020 instead. Due to the 68010's small speed boost over the 68000 and its support for virtual memory, though, it can be found in a number of smaller Unix systems, both with the 68451 MMU (in the Torch Triple X), and with a custom MMU (such as the Sun-2 Workstation, AT&T UNIX PC, the NCR Tower XP and early HP9000s like the Model 300 and 310) and various research machines. It was used sometimes to add a small boost to Atari ST and Amiga computers, and the Sega Genesis game console.

The 68010 had a feature useful to hackers. The Vector Base Register (VBR) allows the exception vectors to be moved from low memory to an arbitrary location. A monitor/debugger program can intercept the interrupts, and maintain the ability to activate on demand even if the low-memory vectors are modified. Unfortunately on reset the VBR is still zero and this means that the 68010 still use the address stored in memory address 0 as the initial PC.

[edit] References

  1. ^ CPU World

[edit] External links